Eclipse Embedded CDT

A family of Eclipse CDT extensions and tools for GNU Arm & RISC-V development

GNU MCU Eclipse RISC-V Embedded GCC v7.1.1-2-20170912-* released GNU MCU Eclipse RISC-V Embedded GCC v7.2.0-1-20171109 released

GNU MCU Eclipse OpenOCD v0.10.0-4-20171004* released

Version v0.10.0-4-20171004-0812-dev is a maintenance release; the main change was to revert some of the RISC-V patches that caused problems for other targets.

Binary files »

Changes

  • update to the latest RISC-V 12bb3a4 commit and to the master 7719e96 commit from Aug 10th, 2017
  • revert some of the RISC-V patches in gdb_server.c that caused GDB crashes for other targets.

Differences from RISC-V releases

The following configuration files were added:

  • board/sifive-coreplexip-e31-arty.cfg
  • board/sifive-coreplexip-e51-arty.cfg
  • board/sifive-freedom-e300-hifive1.cfg

Known problems

RISC-V

  • the registers names (x0-x31) displayed in the Registers view are not consistent with the register names in the Disassembly view;
  • the list of register displayed in the Registers view should not include the list of 4096 CSRs

Build notes

The build environment uses Debian 9 Docker containers.

Binaries

Binaries for Windows, macOS and GNU/Linux are provided. For Windows and macOS, separate installable and plain archives are provided.

Checksums

The SHA-256 hashes for the files are:

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